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| PROCESS Small Signal Transistor NPN - Silicon Darlington Transistor Chip CP307 Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 15,440 PRINCIPAL DEVICE TYPES 2N6426 2N6427 CMPT6427 CMPTA13 CMPTA14 CXTA14 CZTA14 MPSA13 MPSA14 EPITAXIAL PLANAR 27 x 27 MILS 9.0 MILS 5.3 x 3.8 MILS 5.3 x 6.5 MILS Al - 30,000A Au - 18,000A BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (1-August 2002) Central TM PROCESS CP307 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (1-August 2002) |
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